Milpitas, CA

compliance + Familiarity with FPGA/EPLD tools (Xilinx/Altera) **Skills:** + Cadence OrCAD and Allegro

Sunnyvale, CA

Palladium, Veloce, Zebu) OR FPGA (Xilinx, Altera) flow + Proven design verification skills

Sunnyvale, CA

Proven experience with bring up, debugging and verification on Xilinx FPGA. + Good understanding on CDC and FPGA timing

Sunnyvale, CA

Proven experience with bring up, debugging and verification on Xilinx FPGA. + Good understanding on CDC and FPGA timing

Sunnyvale, CA

Proven experience with bring up, debugging and verification on Xilinx FPGA. + Good understanding on I2C/SPI/UART

Milpitas, CA

Development** + Target high-end FPGAs (Xilinx Versal, Intel Agilex); perform synthesis, P&

Cupertino, CA

Palladium, Veloce, Zebu) OR FPGA (Xilinx, Altera) flow + Proven design verification skills

San Jose, CA

Define the micro-architecture for FPGA designs + Experienced with Xilinx, Altera, Microchip and Lattice FPGA design

Santa Clara, CA

Protocompiler or Siemens VPS and Xilinx Vivado + Exposure to ASIC design and verification

Cupertino, CA

Lattice Radiant, design constraints, familiarity with AMD (Xilinx) and Lattice FPGA technologies + Strong System

Cupertino, CA

Lattice Radiant, design constraints, familiarity with AMD (Xilinx) and Lattice FPGA technologies + Strong System

Santa Clara, CA

Protocompiler or Synplify Premier and Xilinx Vivado + Exposure to ASIC design and verification

Santa Clara, CA

CPLD development and familiarity with FPGA EDA tools from Xilinx, Altera, or Lattice like Vivado, Quartus

San Jose, CA

: 1. Synopsys HAPs prototyping platform; 2. Xilinx/Altera FPGAs; 3. System level debug; 4. Hardware

Santa Clara, CA

Synopsys ProtoCompiler or Synplify Premier, Xilinx Vivado, and familiarity with emulation platforms such as Synopsys

San Jose, CA

the FPGA development process & tool flow from RTL to bitstream for Xilinx and/or Altera products + Hands on experience with lab

Santa Clara, CA

tools (Spyglass), and FPGA prototyping tools (Xilinx Vivado, Altera Quartus II).** **Job Type

San Jose, CA

emulation (Palladium, Veloce, Zebu) and FPGA (Xilinx) platforms + Formal verification concepts